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Download High-/Mixed-Voltage Analog and RF Circuit Techniques for by Pui-In Mak PDF

By Pui-In Mak

This ebook provides high-/mixed-voltage analog and radio frequency (RF) circuit ideas for constructing inexpensive multistandard instant receivers in nm-length CMOS methods. Key merits of high-/mixed-voltage RF and analog CMOS circuits are defined, cutting-edge examples are studied, and circuit strategies sooner than and after voltage-conscious layout are in comparison. 3 genuine layout examples are incorporated, which exhibit the feasibility of high-/mixed-voltage circuit recommendations.

  • presents a beneficial precis and actual case reviews of the state of the art in high-/mixed-voltage circuits and structures;
  • Includes novel high-/mixed-voltage analog and RF circuit recommendations – from inspiration to perform;
  • Describes the 1st high-voltage-enabled mobile-TVRF front-end in 90nm CMOS and the 1st mixed-voltage full-band mobile-TV Receiver in 65nm CMOS;
  • Demonstrates the feasibility of high-/mixed-voltage circuit concepts with genuine layout examples.

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Extra resources for High-/Mixed-Voltage Analog and RF Circuit Techniques for Nanoscale CMOS

Example text

A voltage-to-voltage LNA is therefore chosen to drive those transconductance amplifiers that feature purely capacitive input impedance. 2 depicts the schematic of the proposed LNA. In order to save voltage headroom and reduce the number of active devices, the cascode structure was not applied. The main consequence of not using a cascode structure is a limited 174-245MHz Polyphase I/Q-Mixer Scheme Off-Chip 1 470-860MHz Switches Balun This Work -45° LNA 1450-1700MHz Iout+ Iout - √2 0° 1 45° To Q-channel Fig.

PMOS-based LDO (Fig. 22a) is more popular than its NMOS counterpart (Fig. 22b) for its lower dropout voltage property. The main issue of PMOS-based LDO is the necessity of an external big capacitor to ensure the stability. Such a requirement significantly increases the manufacturing cost and pin counts because many LDOs are entailed for a SoC. , cap-less) and features better stability and PSRR+. The key appeal is that VG will need to be greater VDD12, which is not normally possible in a single-VDD design.

1 Power Amplifier and Wideband Balun-LNA (High-VDD þ Mixed-Transistor) VDD-upscaling circuits have appeared in the literature for many years. The most common application is on the PA. As shown in Fig. 13-mm CMOS [6]. , │VGD,rms│, │VGS,rms│ and │VDS,rms│ have to be less than VDD of each device type). M2 entails a triple well for independent bulk-source connection. On the other hand, in order to protect M1 from overstressing automatically during the power-up/down transients, we propose to add a thick-oxide device Mpt1 can be added to the Vx node.

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